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 SSGSC34119
Elektronische Bauelemente Low Power Audio Amplifier
DESCRIPTION
The SGSC34119 is a low power audio amplifier integrated circuit intended (primarily) for telephone applications, such as in speakerphones. It provides differential speaker outputs to maximize output swing at low supply voltages (2.0V minimum). Coupling capacitors to the speaker are not required. Open loop gain is 80 dB, and the closed loop gain is set with two external resistors. A Chip Disable pin permits powering down and/or muting the input signal.
FEATURES
Wide Operating Supply Voltage Range (2.0V to 16V), allows Telephone Line Powered Applications Low Quiescent Supply Current (2.7mA Typ) for Battery Powered Applications Chip Disable Input to Power Down the IC Low Power-Down Quiescent Current (65A Typ) Drives a Wide Range of Speaker Loads (8.0 and Up) Output Power Exceeds 250 mW with 32 Speaker Low Total Harmonic Distortion (0.5% Typ) Gain Adjustable from <0 dB to >46 dB for Voice Band Requires Few External Components
PACKAGE DIMENSIONS
REF. A B C D E F
Millimeter Min. 5.80 4.80 3.80 0 0.40 0.19 Max. 6.20 5.00 4.00 8 0.90 0.25
REF. M H L J K G
Millimeter Min. Max. 0.10 0.25 0.35 0.49 1.35 1.75 0.375 REF. 45 1.27 TYP.
BLOCK DIAGRAM AND SIMPLIFIED APPLICATION & PIN CONFIGURATION
01-June-2002 Rev. A
Page 1 of 9
SSGSC34119
Elektronische Bauelemente Low Power Audio Amplifier
MAXIMUM RATINGS
Parameter
Supply Voltage Maximum Output Current at VO1 and VO2 Maximum Voltage @ Vin, FC1, FC2, CD Applied Output Voltage to VO1, VO2 when disabled Junction Temperature Note: ESD data available upon request.
Value
-1.0 to +18 250 -1.0, VCC+ 1.0 -1.0, VCC+ 1.0 -55, +140
Units
VDC mA VDC C
RECOMMENDED OPERATING CONDITIONS
Characteristics
Supply Voltage Voltage @ CD (Pin 1) Load Impedance Peak Load Current Differential Gain (5.0 kHz Bandwidth) Ambient Temperature
Symbol
VCC VCD RL IL AVD TA
Min
+2.0 0 8.0 0 -20
Max
+16 VCC 200 46 +70
Units
VDC mA dB C
ELECTRICAL CHARACTERISTICS (TA=25 C unless otherwise specified)
Parameter
AC Input Resistance Open Loop Gain Close Loop Gain Gain Bandwidth Product Output Power
Symbol
Test Conditions
@ Vin Amplifier #1, f < 100Hz Amplifier #2, VCC = 6V, f = kHz, RL = 32 VCC = 3V, RL= 16, THD 10 % VCC = 6V, RL= 32, THD 10 % VCC = 12V, RL= 100, THD 10 % VCC = 6V, RL= 32, Pout = 125 mW
Min
80 -0.35 55 250 400 50 -
Typ
> 30 0 1.5 0.5 0.5 0.6 12 52 >70
Max
+0.35 1.0 -
Units
M dB dB MHz
Amplifiers (AC Characteristics) Ri AVOL1 AV2 GBW Pout3 Pout6 Pout12 THD
mW
Total Harmonic Distortion (f = 1 kHz)
VCC 3V, RL= 8, Pout = 20 mW VCC 12V, RL= 32, Pout = 200 mW
%
Power Supply Rejection (VCC = 6V, VCC = 3V) Differential Muting
C1 = , C2 = 0.0F
PSRR GMT
C1 = 0.1 F, C2 = 0, f = 1 kHz C1 = 1.0 F, C2 = 5.0 f , f = 1 kHz VCC = 6V, 1 kHz f 20 kHz, CD = 2V
dB
dB
Output DC Level
Output Level Output DC Offset Voltage (VO1 - VO2) Input Bias Current Equivalent Resistance
Amplifiers (DC Characteristics) VO(3) VO1, VO2, VCC = 3V, RL = 16 (Rf=75k) VO(6) VCC = 6V VO(12) VCC = 12V VOH High Iout = -75mA, 2VVCC16V VOL Low Iout = 75mA, 2VVCC16V VO IIB RFC1 RFC2
VCC = 6V, Rf = 75k, RL = 32 Vin(VCC=6V)
FC1 (VCC = 6V) FC2 (VCC = 6V)
1.0 -30 100 18
1.15 2.65 5.65 VCC-1 0.16 0 -100 150 25
1.25 +30 -200 220 40 VDC mV nA k VDC
01-June-2002 Rev. A
Page 2 of 9
SSGSC34119
Elektronische Bauelemente Low Power Audio Amplifier
ELECTRICAL CHARACTERISTICS (Cont'd)
Parameter
Input Voltage Input Resistance Power Supply Current
Symbol
Test Conditions Chip Disable (Pin1)
Low High VCC = VCD = 16V
Min
2.0 50 -
Typ
Max
0.8 175 4.0 5.0 100
Units
VIL VIH RCD ICC3 ICC16 ICCD
90 2.7 3.3 65
VDC k mA mA A
Power Supply
VCC = 3V, RL = , CD = 0.8V VCC = 16V, RL = , CD = 0.8V
VCC = 3V, RL = , CD = 2.0V Note: Currents into a pin are positive; currents out of a pin are negative.
PIN FUNCTION DESCRIPTION
Symbol
CD FC2
Pin
1 2
Description
Chip Disable-Digital input. A Logic "0" (<0.8V) sets normal operation. A Logic "1" (2V) sets the power down mode. Input impedance is nominally 90k. A capacitor at this pin increases power supply rejection, and affects turn-on time. This pin can be left open if the capacitor at FC1 is sufficient. Analog ground for the amplifiers. A 1.0F capacitor at this pin (with a 5.0F capacitor at Pin 2) provides (typically) 52dB of power supply rejection. Turn-on time of the circuit is affected by the capacitor on this pin. This pin can be used as an alternate input. Amplifier input. This input capacitor and resistor set low frequency roll-off and input impedance. The feedback resistor is connected to this pin and VO1. Amplifier Output #1. The dc level is (VCC - 0.7)/2. DC supply voltage (+2V to +16V) is applied to this pin. Ground pin for the entire circuit. Amplifier Output #2. This signal is equal in amplitude, but 180 out-of-phase with that at VO1. The dc level is (VCC - 0.7)/2.
FC1
3
Vin VO1 VCC GND VO2
4 5 6 7 8
TYPICAL TEMPERATURE PERFORMANCE (-20C < TA < + 70C)
Function
Input Bias Current (@Vin) Total Harmonic Distortion (VCC = 6V, RL = 32, Pout = 125 mW, f = kHz) Power Supply Current (VCC = 3V, RL = , CD = 0V) (VCC = 3V, RL = , CD = 2V)
Typical Change
40 +0.003 -0.25 -0.03
Units
pA/C %/C A/C
Design Guidelines
General The SGSC34119 is a low power audio amplifier capable of low voltage operation (VCC = 2.0 V minimum) such as that encountered in line-powered speakerphones. The circuit provides a differential output (VO1-VO2) to the speaker to maximize the available voltage swing at low voltages. The differential gain is set by two external resistors. Pins FC1 and FC2 allow controlling the amount of power supply and noise rejection, as well as providing alternate inputs to the amplifiers. The CD pin permits powering down the IC for muting purposes and to conserve power. Amplifiers Referring to the block diagram, the internal configuration consists of two identical operational amplifiers. Amplifier # 1 has an open loop gain of 80 dB (at f 100 Hz), and the closed loop gain is set by external resistor Rf and Ri. The amplifier is unity gain stable, and has a unity gain frequency of approximately 1.5 MHz. In order to adequately cover the telephone voice band (300 Hz to 3400 Hz), a maximum closed loop gain of 46 is recommended. Amplifier #2 is internally set to a gain of -1.0(0dB).
01-June-2002 Rev. A Page 3 of 9
SSGSC34119
Elektronische Bauelemente Low Power Audio Amplifier
The outputs of both amplifiers are capable of sourcing and sinking a peak current of 200 mA. The outputs can typically swing to within 0.4 V above ground, and to with 1.3 V below VCC, at the maximum current. See Figures 17 and 18 for VOH and VOL curves. The output dc offset voltage (VO1-VO2) is primarily a function of the feedback resistor (Rf), and secondarily due to the amplifiers' input offset voltages. The input offset voltage of the two amplifiers will generally be similar for a particular IC, and therefore nearly cancel each other at the outputs. Amplifier #1's bias current, however, flows out of Vin (Pin 4) and through Rf, forcing V01 to shift negative by an amount equal to [Rf x IIB]. VO2 is shifted positive an equal amount. The output offset voltage, specified in the Electrical Characteristics, is measured with the feedback resistor shown in the Typical Application Circuit, and therefore takes into account the bias current as well as internal offset voltages of the amplifiers. The bias current is constant with respect to VCC. FC1 and FC2 Power supply rejection is provided by the capacitors (C1 and C2 in the Typical Application Circuit) at FC1 and FC2. C2 is somewhat dominant at low frequencies, while C1 is dominant at high frequencies, as shown in the graphs of Figures 4 to 7. The required values of C1 and C2 depend on the conditions of each application. A line powered speakerphone, for example, will require more filtering than a circuit powered by a well regulated power supply. The amount of rejection is a function of the capacitors, and the equivalent impedance looking into FC1 and FC2 (listed in the Electrical Characteristics as RFC1 and RFC2). In addition to providing filtering, C1 and C2 also affect the turn-on time of the circuit at power-up, since the two capacitors must charge up through the internal 50 k and 125 k resistors. The graph of Figure 1 indicates the turn-on time upon application of VCC of + 6.0 V. The turn-on time is 60% longer for VCC = 3.0 V, and 20% less for VCC = 9.0V. Turn-off time is < 10 us upon removal of VCC. Chip Disable The Chip Disable (Pin 1) can be used to power down the IC to conserve power, or for muting, or both. When at a Logic "0" (0 V to 0.8 V), the SGSC34119 is enabled for normal operation. When Pin 1 is at a Logic "1" (2.0 V to VCC V), the IC is disabled. If Pin 1 is open, that is equivalent to a Logic "0", although good design practice dictates that an input should never be left open. Input impedance at Pin 1 is a nominal 90 k. The power supply current (when disabled) is shown in Figure 19. Muting, defined as the change in differential gain from normal operation to muted operation, is in excess of 70 dB. The turn-off time of the audio output, from the application of the CD signal, is <2.0 s, and turn on-time is 12 ms-15 ms. Both times are independent of C1,C2, and VCC. When the SGSC34119 is disabled, the voltages at FC1 and FC2 do not change as they are powered from VCC. The outputs, VO1 and VO2, change to a high impedance condition, removing the signal from the speaker. If signals from other sources are to be applied to the outputs (while disabled), they must be within the range of VCC and Ground. Power Dissipation Figures 8 to 10 indicate the device dissipation (within the IC) for various combinations of VCC, RL, and load power. The maximum power which can safely be dissipated within the SGSC34119 is found from the following equation: PD = (140C-TA)/JA where TA is the ambient temperature; and JA is the package thermal resistance (100C /W for the standard DIP package.) The power dissipated within the SGSC34119, in a given application, is found from the following equation: PD = (VCC x ICC) + (IRMS x VCC) - (RL x IRMS2) where ICC is obtained from Figure 19; and IRMS is the RMS current at the load; and RL is the load resistance. Figures 8 to 10, along with Figures 11 to 13 (distortion curves), and a peak working load current of 200 mA, define the operating range for the SGSC34119. The operating range is further defined in terms of allowable load power in Figure 14 for loads of 8.0, 16 and 32. The left (ascending) portion of each of the three curves is defined by the power level at which 10% distortion occurs. The center flat portion of each curve is defined by the maximum output current capability of the SGSC34119. The right (descending) portion of each curve is defined by the maximum internal power dissipation of the IC at 25C. At higher ambient temperatures, the maximum load power must be reduced according to the above equations. Operating the device beyond the current and junction temperature limits will degrade long term reliability. Layout Considerations Normally a snubber is not needed at the output of the SGSC34119, unlike many other audio amplifiers. However, the PC board layout, stray capacitances, and the manner in which the speaker wires are configured, may dictate otherwise. Generally, the speaker wires should be twisted tightly and not more than a few inches in length.
01-June-2002 Rev. A Page 4 of 9
SSGSC34119
Elektronische Bauelemente Low Power Audio Amplifier
CHARACTERISTIC CURVE
01-June-2002 Rev. A
Page 5 of 9
SSGSC34119
Elektronische Bauelemente Low Power Audio Amplifier
CHARACTERISTIC CURVE (cont'd)
01-June-2002 Rev. A
Page 6 of 9
SSGSC34119
Elektronische Bauelemente Low Power Audio Amplifier
CHARACTERISTIC CURVE (cont'd)
01-June-2002 Rev. A
Page 7 of 9
SSGSC34119
Elektronische Bauelemente Low Power Audio Amplifier
CHARACTERISTIC CURVE (cont'd)
01-June-2002 Rev. A
Page 8 of 9
SSGSC34119
Elektronische Bauelemente Low Power Audio Amplifier
CHARACTERISTIC CURVE (cont'd)
01-June-2002 Rev. A
Page 9 of 9


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